1. Field of The Invention
The present invention generally relates to a method of forming a hemispherical grain (HSG) on silicon. More particularly, the present invention relates to a method of forming an HSG on silicon which involves pre-cleaning the surface of the silicon prior to the heat treatment used to transform a seed into a hemispherical grain.
2. Detailed Description Of The Related Art
As the size of semiconductor devices becomes scaled down, the space available for the memory cell capacitor of a dynamic random access memory (DRAM) decreases accordingly. However, such scaled down semiconductor devices must have a large capacitance sufficient to guarantee a proper read/write operation of the DRAM.
Accordingly, a great deal of effort has been expended in achieving a larger capacitance within a limited area. Major approaches employed in the semiconductor industry for this purpose are: (1) reducing the thickness of the dielectric film, (2) increasing the effective surface area of the storage node, and (3) selecting a material with a high dielectric constant.
One method of increasing the effective surface area of the storage node involves forming hemispherical grains (HSGs) on the surface of a storage node. Conventionally, a hemispherical grain is formed by depositing a seed on polysilicon used to form the storage node, and then thermally treating the seed. Details of such a process for forming hemispherical grains are disclosed in U.S. Pat. Nos. 5,696,014, 5,629,223, and 5,770,500.
The prior art method for forming the HSGs on the silicon includes a preparatory step of cleaning the surface of the wafer by wet etching. The preparatory cleaning process is necessary for HSG growth because it enhances the migration of a silicon atom during the subsequent heat treatment.
A consequence of the wet etch cleaning process of the prior art is hydrogen termination of the amorphous silicon on the wafer. The prior art still has the following problems that must be resolved before a high-quality HSG can be grown.
First of all, the pre-cleaned wafers are exposed to the atmosphere when they are in a stand-by state just prior to being loaded into an HSG growth chamber. As a result, a native oxide can be formed on the surface of the wafer even if the wafer is pre-cleaned by being wet etched.
Furthermore, if the entire process of growing HSGs is performed in a fully automatic manufacturing line, the time shift between the equipment of the line makes it difficult to prevent the growth of a native oxide on the pre-cleaned surface of the wafer. The formation of a native oxide, in turn, makes it difficult to grow a high-quality HSG on the surface of the underlying film. Still further, a bridging phenomena can occur between neighboring storage nodes due to the selective loss.
FIG. 1 is a schematic diagram showing the existence of bridging of HSGs between adjacent storage nodes when the prior art method is practiced.
Referring to FIG. 1, the semiconductor device includes a gate structure 101 formed on substrate 100, a bit line 102, and a storage node 103 on which HSGs 104 have been formed in accordance with the prior art. Reference numeral 110 designates an area between neighboring nodes where bridging occurs. It is easily understood why such bridging becomes more prevalent as the pitch of the nodes becomes smaller with the scaling down of the device.
FIG. 2 is a flow diagram illustrating the process of forming HSGs according to the prior art. Referring to this figure, a polysilicon layer is deposited (step 201) on a wafer and patterned (step 202) to form the lower electrode of a cell capacitor. After the wafer is cleaned ex-situ (step 203) by a wet etch process, the wafer is loaded into an HSG growth reactor (step 204). Subsequently, the polysilicon is seeded (step 205) using Si.sub.2 H.sub.6 gas to form polysilicon nuclei on the surface of the polysilicon. The flow rate (301 of FIG. 3) of the Si.sub.2 H.sub.6 gas is ramped up during a ventilation step and is maintained at 15 sccm during seed formation. The polysilicon nuclei are transformed into HSGs by thermally treating them in the reactor (step 206). FIG. 3 is a graphical representation of the HSG growth process according to the prior art. The traditional HSG growth process has discrete start-up, ventilation, formation of seeded layer, and heat treatment stages.
The prior art experiences its severe problem of native oxide formation on the surface of the patterned polysilicon storage node, when the wafer is exposed to air for more than ten minutes between the ex-situ pre-cleaning of the wafer and the loading of the wafer into the HSG growth reactor. As mentioned above, the situation worsens when factory automation carries out the semiconductor processing steps because with such factory automation, the wafer is inevitably exposed to the air.
The presence of the native oxide on the surface of the polysilicon storage node prevents the growth of the HSGs. Furthermore, because the spacing between the adjacent storage nodes may be on the order of a deep-sub-half-micrometer scale, the HSG grains grown on the vertical wall of a storage node can bridge those formed on the neighboring node.